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Primace 6.0 new features list


Synthesis


  • Support HR3(MPW) Memory inference
  • Support counter IP mapping
  • Support MAC cascade
  • Support async/sync set/reset FF
  • Support HR3 fast IO
  • Support SPI interface (mapping)
  • Support M5 SDP mode memory inference
  • Support DDR IO (mapping)
  • Design hierarchical


P&R


  • Support GBUF,GBUF_GATE,RBUF,RBUF_GATE
  • Support 8 global clocks
  • Support dynamic clock switch
  • Support DDR IO
  • Support PLL deskew mode


STA


  • Support HR3 timing driven flow
  • Support DDR IO
  • Bitgen&Download
  • Support PLL deskew mode
  • Support DDR IO
  • Driver support Win8 system


GUI 


  • Support HR3 IP wizard
  • Support LVDS soft IP for HR3
  • Support SDC Editor tool
  • Support New Timing report
  • Support output IO assignment as csv file
  • Support HR3 chip editor
  • Support HR3 IO editor
  • Integrate timing analysis file(sdc) into project file